1. Field of the Invention
The present invention relates to substrate structures, and more particularly, to a substrate structure having conductive bumps.
2. Description of Related Art
Conventional flip-chip semiconductor packaging technologies mainly involve forming solder bumps on conductive pads of chips and electrically connecting the solder bumps to packaging substrates. Compared with wire bonding technologies, flip-chip technologies lead to shorter conductive paths and improved electrical performance. Further, back surfaces of chips can be exposed to improve the heat dissipating efficiency.
FIG. 1 is a schematic partial cross-sectional view of a conventional substrate structure. Referring to FIG. 1, a plurality of openings are formed in an insulating layer 11 of a chip 10 for exposing conductive pads 100 of the chip 10. Therein, the insulating layer 11 includes a first insulating layer 11a and a second insulating layer 11b. An adhesive layer 12, a wetting layer 13 and a protection layer 14 are sequentially formed in the openings of the insulating layer 11 and on the insulating layer 11, and a plurality of solder bumps 16 are formed on the protection layer 14 at positions corresponding to the conductive pads 100. Then, portions of the adhesive layer 12, the wetting layer 13 and the protection layer 14 that are not covered by the solder bumps 16 are removed. As such, the remaining portions of the adhesive layer 12, the wetting layer 13 and the protection layer 14 under each of the solder bumps 16 are defined as a UBM (Under Bump Metallurgy) layer 15 for firmly securing the solder bump 16 on the corresponding conductive pad 100.
The adhesive layer 12 is made of Ti, Cr or TiW so as to provide a strong bonding between the conductive pad 100 and the wetting layer 13. The wetting layer 13 is made of Ni or Cu, which is easily wettable by a solder material. Therefore, during a reflow process, the solder bump 16 can be completely bonded to the conductive pad 100 and assume a ball shape. The protection layer 14 is made of low resistance metal, for example, Au or Cu, so as to protect the solder bump 16 and reduce the resistance value thereof.
However, along with miniaturization of the chip 10, the pitch between the conductive pads 100 has been reduced. Accordingly, the conventional flip-chip packaging processes easily cause solder bridging to occur between adjacent solder bumps 16.
Therefore, how to overcome the above-described drawbacks has become critical.